Hybrid CMOS Single-Electron-Transistor Device and Circuit Modeling.
CMOS (complementary metal oxide semiconductor) is a widely accepted and utilized technology among electrical engineers involved with circuit design. SET (single electron transistor) technology has recently gained significant attention, because it can be combined with CMOSs to improve overall perform...
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| Author / Creator: | |
|---|---|
| Other Authors / Creators: | Ionescu, Adrian Mihai. |
| Format: | eBook Electronic |
| Language: | English |
| Imprint: | Norwood : Artech House, 2006. |
| Series: | Integrated Microsystems
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| Subjects: | |
| Local Note: | Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2022. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries. |
| Online Access: | Click to View |
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| 100 | 1 | |a Mahapatra, Santanu. | |
| 245 | 1 | 0 | |a Hybrid CMOS Single-Electron-Transistor Device and Circuit Modeling. |
| 264 | 1 | |a Norwood : |b Artech House, |c 2006. | |
| 264 | 4 | |c ©2006. | |
| 300 | |a 1 online resource (237 pages) | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a Integrated Microsystems | |
| 505 | 0 | |a Hybrid CMOS Single-Electron-Transistor Device and Circuit Design -- Contents vii -- Preface xiii -- Acknowledgments xvii -- 1 Introduction: CMOS Scaling and Single Electronics 1 -- 1.1 CMOS Scaling Limits 1 -- 1.2 Emerging Nanotechnologies: Life After CMOS 5 -- 1.3 Single-Electron Transistors-An Overview 7 -- 1.4 Short History 10 -- References 12 -- 2 Compact Modeling of SETs 15 -- 2.1 Computer-Aided Design Tools for SET Simulation 15 -- 2.2 Orthodox Theory of Single-Electron Tunneling 17 -- 2.3 Carrier Transport in SET 18 -- 2.4 Compact Modeling of SET 22 -- 2.5 Model Verification 32 -- 2.6 Subthreshold Slope 37 -- 2.7 Parameter Extraction 43 -- 2.8 Other SET Models 46 -- 2.9 SET and MOSFET Modeling Techniques-A Comparison 47 -- 2.10 Summary 47 -- References 49 -- 3 Single-Electron Transistor Logic 51 -- 3.1 Single-Electron Memory Versus Logic 51 -- 3.2 SET Inverter Characteristics 52 -- 3.3 Analysis of Inverter Characteristics 54 -- 3.4 Estimation of Power Dissipation 63 -- 3.5 Propagation Delay of SET Inverter 72 -- 3.6 Other Single-Electron Logic Gates 73 -- 3.7 Comparison Between SET and CMOS Logic 80 -- 3.8 Summary 80 -- References 81 -- 4 Hybridization of CMOS and SET 83 -- 4.1 Motivation for CMOS-SET Hybridization 83 -- 4.2 Challenges for CMOS-SET Hybridization 85 -- 4.3 CMOS-SET Cosimulation and Codesign 88 -- 4.4 Case Studies of Different Hybrid CMOS-SET Architectures 90 -- 4.5 SETMOS-Coulomb Blockade Oscillations in the Microampere Range 106 -- 4.6 Summary 121 -- References 126 -- 5 Few Electron Multiple Valued Logic and Memory Design 129 -- 5.1 Multiple Value Switching Algebra 129 -- 5.2 Motivation for MV Logic Design 130 -- 5.3 Challenges for MVL Circuit Design 134 -- 5.4 SETMOS Quaternary Logic 142 -- 5.5 SETMOS Quaternary SRAM -- 5.6 Summary 165 -- References 165 -- 6 Fabrication of SETs and Compatibility with Silicon CMOS 169. | |
| 505 | 8 | |a 6.1 Challenges of SET Fabrication 169 -- 6.2 Single Island SET Fabrication 173 -- 6.3 Fabrication of Multi-Island SETs 185 -- 6.4 Fabrication of CNTs and Molecular SETs 193 -- 6.5 Summary 197 -- References 199 -- Appendix A Gibbs Free Energy and Development of MIB Model 201 -- Appendix B Transconductance and Conductance Analysis of the SET 211 -- About the Authors 215 -- Index 217. | |
| 520 | |a CMOS (complementary metal oxide semiconductor) is a widely accepted and utilized technology among electrical engineers involved with circuit design. SET (single electron transistor) technology has recently gained significant attention, because it can be combined with CMOSs to improve overall performance of integrated circuits -- reducing power consumption and achieving greater functionality. This cutting-edge resource provides professionals with the conceptual framework and specific strategies for CMSO-SET hybrid circuit design. The book offers a thorough understanding of the pros and cons of digital SETs, and explains how SETs can solve the intrinsic drawbacks of CMOS technology. From the basic physics of single electron transistors and SET modeling, to advanced concepts like CMSO-SET co-integration, the book helps engineers realize significant performance benefits by showing them how to incorporate SET technology into their design projects. | ||
| 588 | |a Description based on publisher supplied metadata and other sources. | ||
| 590 | |a Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2022. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries. | ||
| 650 | 0 | |a Metal oxide semiconductors, Complementary. | |
| 650 | 0 | |a Integrated circuits -- Design and construction. | |
| 655 | 4 | |a Electronic books. | |
| 700 | 1 | |a Ionescu, Adrian Mihai. | |
| 776 | 0 | 8 | |i Print version: |a Mahapatra, Santanu |t Hybrid CMOS Single-Electron-Transistor Device and Circuit Modeling |d Norwood : Artech House,c2006 |z 9781596930698 |
| 797 | 2 | |a ProQuest (Firm) | |
| 830 | 0 | |a Integrated Microsystems | |
| 856 | 4 | 0 | |u https://ebookcentral.proquest.com/lib/well/detail.action?docID=338741 |z Click to View |